1. Field of the Invention
The present invention relates to coordinate input devices. More particularly, the present invention relates to a coordinate input device including a back light such as an electrostatic capacitance system or electromagnetic induction system tablet.
2. Description of Background Art
FIG. 7 shows an appearance of a conventional Japanese word processor that allows coordinate input, and FIG. 8 is a perspective view of the conventional word processor of FIG. 7 showing the structure of a display unit thereof.
Referring to FIG. 7, a Japanese word processor includes a lower cabinet 1 and an upper cabinet 2. The lower cabinet 1 includes a floppy disc drive 3. The upper cabinet 2 includes a display unit 4, a printer 5, a pen 6, a keyboard 7, and a ten-key light receiving unit 8. The pen 6 serves to detect a coordinate position on the display unit 4.
Referring to FIG. 8, the display unit 4 includes a display cabinet 41 in which the pen 6 can be placed, a liquid crystal unit 42, and a back light unit 43. The back light unit 43 has lamp holders 44 and 44' provided at the top portion and the bottom portion, respectively, with a light-guiding plate 45 provided therebetween. An inverter 46 is provided at the left side of the back light unit 43. The inverter 46 oscillates a high voltage to drive a lamp (not shown) held by lamp holder 44. Light from this lamp is directed from beneath the liquid crystal 42 by the light-guiding plate 45.
FIG. 9 is a block diagram of a coordinate input device for driving the display unit of FIG. 8 and for detecting a coordinate position indicated by the pen. FIG. 10 is a timing chart showing the periods of the liquid crystal unit display and coordinate detection according to the circuitry shown in FIG. 9.
The electrical configuration of the coordinate input device will be described hereinafter. Referring to FIG. 9, the liquid crystal unit 42 is formed with a liquid crystal layer between common electrodes Y1-Yn (referred to as "Y" hereinafter) and segment electrodes X1-Xm (referred to as "X" hereinafter). The portion of the liquid crystal where each common electrode Y and each segment electrode X cross each other is a pixel. The common electrodes Y are driven by a common driving circuit 22. The segment electrode X is driven by a segment driving circuit 23. The common driving circuit 22 and the segment driving circuit 23 are connected to a display control circuit 25 and a position detection control circuit 26 via a switching circuit 24. The switching circuit 24 is controlled by a control circuit 27 to provide an output from the display control circuit 25 during a display period and an output from the position detection control circuit 26 during a position detection period to driving circuits 22 and 23.
During a display period, the display control circuit 25 provides a start signal S, and an inversion signal M, clock signals CP1 and CP2, and display data DO--D3. The scanning period for scanning pixels of one row is the cycle of the clock signal CP1. The clock signal CP1 is applied to the common driving circuit 22 and the segment driving circuit 23 via the switching circuit 24. The start signal S indicates the start of a scanning period for display. The start signal S is provided from the switching circuit 24 to be applied to the common driving circuit 22 in synchronization with the clock signal CP1.
In response to a shift of the clock signal CP1, a driving signal is provided to the common electrodes Y from an output terminal of the common driving circuit 22 corresponding to the shift position. This driving signal is produced according to bias voltages V0-V5 supplied from the power source circuit 32. The scanning period for scanning one column of pixels is divided into a plurality of periods, which is one cycle of the clock signal CP2. The clock signal CP2 is provided via the switching circuit 24 to be applied to the segment driving circuit 23.
Display data D0-D3 are output via the switching circuit 24 to be applied to the segment driving circuit 23 to be sequentially fetched into a register therein. When display data corresponding to one row of pixels are fetched, these display data are latched at the timing of the clock signal CP1, whereby a driving signal corresponding to each display datum is output from an output terminal of the segment driving circuit 23 to segment electrodes X. This driving signal is produced according to bias voltages V0-V5 supplied from the power source circuit 32. The inversion signal M cyclically inverts the polarity of the voltage applied to the liquid crystal to prevent degradation of the liquid crystal caused by the hysteresis.
Pixels of the liquid crystal panel 42 are driven according to their respective row sequence by operations of the common driving circuit 22 and the segment driving circuit 23, whereby a pixel corresponding to the display data is displayed on the liquid crystal panel 42.
During a coordinate detection period, the position detection control circuit 26 provides a start signal Sd, an inversion signal Md, clock signals CP1d and CP2d, and driving data D0d-D3d. The scanning period for scanning one row of common electrodes Y is the cycle of the clock signal CP1d. The clock signal CP1d is applied to the common driving circuit 22 and the segment driving circuit 23 via the switching circuit 24. The start signal Sd indicates start of scanning of common electrodes Y. The start signal Sd is provided via the switching circuit 24 to be applied to the common driving circuit 22 in synchronization with the clock signal CP1d. In response to a shift of the clock signal CP1d, a scanning signal is provided to common electrodes Y from an output terminal of the common driving circuit 22 corresponding to the shift position. This scanning signal is produced according to bias voltages V0-V5 supplied from the power source circuit 32.
The scanning period for scanning one column of segment electrodes X is the cycle for the clock signal CP2d. The clock signal CP2d is applied form the switching circuit 24 to the segment driving circuit 23. Driving data D0d-D3d provided via the switching circuit 24 are applied to the segment driving circuit 23 to be sequentially fetched into an internal register thereof. When driving data corresponding to one row of segment electrodes X are fetched, these driving data are latched a the timing of the clock signal CP1d, whereby a driving signal corresponding to each driving data is provided from an output terminal of the segment driving circuit 23 to segment electrodes X. This driving signal is produced according to bias voltages V0-V5 supplied from the power source circuit 32. The inversion signal Md cyclically quickly inverts the polarity of the voltage applied to the liquid crystal to prevent degradation of the liquid crystal caused by electrolysis.
When the pen 6 approaches the surface of the liquid crystal panel 42, voltage is induced at the electrode of the position detection pen 6 due to a stray capacitance between the electrode provided at the tip of the position detection pen 6 and electrodes X and Y of the liquid crystal panel 42 to which voltages are applied. The voltage induced in the pen 6 is amplified by an amplifier 29 to be applied to an X coordinate detection circuit 30 and a Y coordinate detection circuit 31. The X and Y coordinate detection circuits 30 and 31 calculate the X and Y coordinates, respectively, according to the generation timing of an induced voltage in the pen 6 and a timing signal from the control circuit 27.
FIG. 11 is a diagram for describing a coordinate detection operation by the position detection pen 6.
As described in conjunction with FIG. 9, a detecting electrode of high impedance is provided at the tip of the pen 6. When the pen 6 is in closed proximity to the display surface which is the detection panel surface, a small capacitance is formed between the electrodes of the panel and the pen 6 as shown in FIG. 11(a). When a pulse voltage is applied to the electrode of the panel, a small voltage is induced at the electrode of the pen 6 as shown in FIG. 11(b) by electrostatic induction. Because this induced voltage shows a peak value when a scanning voltage is applied to the electrode right beneath the pen 6, the position of the pen 6 can be identified by sequentially applying a scanning voltage from the edge of the display electrode group to calculate the timing until the peak value is achieved.
The lamp held by the lamp holder 44 of the back light unit 43 is driven by the inverter 46. There is a possibility of erroneous operation in the coordinate detection due to a high voltage generated by the inverter 46 and noise from the inverter to enter from the wiring and the high voltage terminal of the lamp into the tip of the pen 6 to be taken as noise. In order to prevent such erroneous operation, a conductive coating is applied at the hatched outside portion of the lamp holder 44 as shown in FIG. 12 to provide a shield or enclosing the display element side at the high voltage side of the lamp 47 with a shield plate 48 to prevent the tip of the pen 6 from catching noise. The cable connecting the pen 6 with the lamp 29 is shielded.
However, this provision of a shield increases the cost, and complete shielding could not be achieved even if the lamp holder 44 and the inverter 46 are enclosed by a shield plate.